Invention Grant
US08392761B2 Memory checkpointing using a co-located processor and service processor
有权
使用位于同一处理器和服务处理器的内存检查点
- Patent Title: Memory checkpointing using a co-located processor and service processor
- Patent Title (中): 使用位于同一处理器和服务处理器的内存检查点
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Application No.: US12751005Application Date: 2010-03-31
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Publication No.: US08392761B2Publication Date: 2013-03-05
- Inventor: Matteo Monchiero , Naveen Muralimanohar , Partha Ranganathan
- Applicant: Matteo Monchiero , Naveen Muralimanohar , Partha Ranganathan
- Applicant Address: US TX Houston
- Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee: Hewlett-Packard Development Company, L.P.
- Current Assignee Address: US TX Houston
- Main IPC: G06F11/00
- IPC: G06F11/00
Abstract:
A system and method is shown that includes a processor operatively connected to a memory, the processor to include a memory controller to control access to the memory. The system and method also includes a service processor, co-located on a common board and operatively connected to the processor and the memory, the service processor to include an additional memory controller to control access to the memory as part of a checkpoint regime.
Public/Granted literature
- US20110246828A1 Memory Checkpointing Using A Co-Located Processor and Service Processor Public/Granted day:2011-10-06
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