A memory controller includes a sorting determination circuit which activates a sorting signal when an access request address for wrapping access to at least one memory block of a semiconductor memory is different from a first leading address of the at least one memory block, an address conversion circuit which sets the first leading address to an access starting address when the sorting signal is activated, a first data sorting circuit which sorts, when the sorting signal is activated, data sequentially read from the semiconductor memory in accordance with the access starting address starting from data corresponding to the access request address and a first output circuit which outputs the sorted data to an external bus.