Invention Grant
US08392630B2 Information processing apparatus having first DMA controller and second DMA controller wherein selection circuit determines which DMA will perform data transfer based on higher data transfer performance
有权
具有第一DMA控制器和第二DMA控制器的信息处理设备，其中选择电路基于更高的数据传输性能确定哪个DMA将执行数据传输
- Patent Title: Information processing apparatus having first DMA controller and second DMA controller wherein selection circuit determines which DMA will perform data transfer based on higher data transfer performance
- Patent Title (中): 具有第一DMA控制器和第二DMA控制器的信息处理设备，其中选择电路基于更高的数据传输性能确定哪个DMA将执行数据传输
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Application No.: US13355038Application Date: 2012-01-20
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Publication No.: US08392630B2Publication Date: 2013-03-05
- Inventor: So Yokomizo
- Applicant: So Yokomizo
- Applicant Address: JP Tokyo
- Assignee: Canon Kabushiki Kaisha
- Current Assignee: Canon Kabushiki Kaisha
- Current Assignee Address: JP Tokyo
- Agency: Fitzpatrick, Cella, Harper & Scinto
- Priority: JP2008-249134 20080926
- Main IPC: G06F13/28
- IPC: G06F13/28
Abstract:
Provided is an information processing apparatus and method of controlling same in which, when data transfer is performed among a plurality of control circuits, which control circuit is used to execute data transfer is controlled appropriately based on the transfer conditions of data transfer. To accomplish this, the apparatus has first and second control circuits, a request for data transfer performed between the first and second control circuits is acquired, the transfer conditions of the acquired data transfer are analyzed and which of the first and second control circuits is to execute the data transfer is selected.
Public/Granted literature
- US20120124250A1 INFORMATION PROCESSING APPARATUS AND METHOD OF CONTROLLING SAME Public/Granted day:2012-05-17
Information query
