Invention Grant
- Patent Title: Accelerated access apparatus and reading and writing methods thereof
- Patent Title (中): 加速存取装置及其读写方法
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Application No.: US12643941Application Date: 2009-12-21
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Publication No.: US08392620B2Publication Date: 2013-03-05
- Inventor: Jin-min Lin
- Applicant: Jin-min Lin
- Applicant Address: TW Shindian
- Assignee: Genesys Logic, Inc.
- Current Assignee: Genesys Logic, Inc.
- Current Assignee Address: TW Shindian
- Priority: TW098136373 20091027
- Main IPC: G06F3/00
- IPC: G06F3/00

Abstract:
An accelerated access apparatus and reading and writing methods thereof are described. A processing unit is used to determine whether the continuation state of a plurality of first address parameters of first request signals. Each first request signal has a first address length. When the first address parameters are continuous thereamong, the processing unit converts one of the second request signals into a second reading command which has a second reading address and a second reading address length. The second reading address length is greater than one of the first address lengths. The processing unit executes the second reading command to read data content to be stored in a buffer unit based on the second reading address and the second reading address length for responding to the second request signals.
Public/Granted literature
- US20110099296A1 ACCELERATED ACCESS APPARATUS AND READING AND WRITING METHODS THEREOF Public/Granted day:2011-04-28
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