Invention Grant
- Patent Title: Readout circuit and semiconductor storage device
- Patent Title (中): 读出电路和半导体存储设备
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Application No.: US13050060Application Date: 2011-03-17
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Publication No.: US08391071B2Publication Date: 2013-03-05
- Inventor: Toru Takahashi
- Applicant: Toru Takahashi
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Turocy & Watson, LLP
- Priority: JP2010-241240 20101027
- Main IPC: G11C16/28
- IPC: G11C16/28

Abstract:
A readout circuit has a sense amplifier to compare a cell current which changes according to whether a memory cell is on or off to a reference current to output a comparison signal of a first logic value upon detecting that the cell current is smaller than the reference current, and to output a comparison signal of a second logic value upon detecting that the cell current is greater than the reference current, the readout circuit outputting a data output signal depending upon an output of the sense amplifier. The reference current is set to be greater than a middle value between a first cell current, which flows when the memory cell is in an off-state, and a second cell current, which flows when the memory cell is in an on-state, the reference current is greater than the first cell current and is smaller than the second cell current. The sense amplifier outputs the comparison signal of the second logic value unless the sense amplifier detects that the cell current is smaller than the reference current as a result of a comparison made between the cell current and the reference current, wherein the sense amplifier outputs the comparison signal of the second logic value regardless of whether the sense amplifier detects that the cell current is greater than the reference current.
Public/Granted literature
- US20120106258A1 READOUT CIRCUIT AND SEMICONDUCTOR STORAGE DEVICE Public/Granted day:2012-05-03
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