Invention Grant
- Patent Title: Integrated jitter compliant clock signal generation
- Patent Title (中): 集成抖动兼容的时钟信号生成
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Application No.: US12900424Application Date: 2010-10-07
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Publication No.: US08390358B2Publication Date: 2013-03-05
- Inventor: Shawn Scouten , Malcolm Stevens , Kevin Parker
- Applicant: Shawn Scouten , Malcolm Stevens , Kevin Parker
- Applicant Address: US CA Sunnyvale
- Assignee: Cortina Systems, Inc.
- Current Assignee: Cortina Systems, Inc.
- Current Assignee Address: US CA Sunnyvale
- Main IPC: H03K3/00
- IPC: H03K3/00

Abstract:
Integrated jitter compliant clock signal generation apparatus and methods are provided. Input signals having different frequencies are used to generate respective clock signals having closely spaced frequencies. The input signals might be generated, for example, in adjacent Phase Locked Loops (PLLs) which receive reference clock signals. The reference clock signals, or signals from which the reference clock signals originate, are also closely spaced. The closely spaced reference clock signals are effectively separated for cleanup and then brought back together to provide the closely spaced clock signals. This allows cleanup of the closely spaced reference clock signals to occur at staggered and more widely spaced frequencies. These techniques could also be applied to reference clock signals which are harmonically related and are used to generate harmonically related output clock signals.
Public/Granted literature
- US20120086491A1 INTEGRATED JITTER COMPLIANT CLOCK SIGNAL GENERATION Public/Granted day:2012-04-12
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