Invention Grant
- Patent Title: Reconfigurable logical circuit
- Patent Title (中): 可重构逻辑电路
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Application No.: US13138643Application Date: 2010-02-19
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Publication No.: US08390321B2Publication Date: 2013-03-05
- Inventor: Shogo Nakaya
- Applicant: Shogo Nakaya
- Applicant Address: JP Tokyo
- Assignee: NEC Corporation
- Current Assignee: NEC Corporation
- Current Assignee Address: JP Tokyo
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2009-065741 20090318
- International Application: PCT/JP2010/001105 WO 20100219
- International Announcement: WO2010/106738 WO 20100923
- Main IPC: H03K19/173
- IPC: H03K19/173

Abstract:
Provided is a reconfigurable logic circuit that can effectively use a preposition logic that composes a logic block. The reconfigurable logic block according to the present invention includes a plurality of logic blocks (199) having a full adder (30), two preposition logics (20) that perform a plurality of logic operations according to configuration data, an extended logic block (60) that can perform the logic operation of one or more kinds. Outputs (21A and 21B) of the preposition logic are respectively connected to two argument inputs (A and B) of the full adder (30). A carry output (CO) of the full adder (30) is connected to the extended logic block (60). One selected from a plurality of signals including a fixed logic value is input to a carry input (CI) of the full adder according to the configuration data, and the extended logic block of other logic block generates an output signal according to an output of the extended logic block.
Public/Granted literature
- US20120007633A1 RECONFIGURABLE LOGICAL CIRCUIT Public/Granted day:2012-01-12
Information query
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