Invention Grant
- Patent Title: Test system and test method of semiconductor integrated circuit
- Patent Title (中): 半导体集成电路的测试系统和测试方法
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Application No.: US12801207Application Date: 2010-05-27
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Publication No.: US08390310B2Publication Date: 2013-03-05
- Inventor: Shinsuke Hamanaka
- Applicant: Shinsuke Hamanaka
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2009-133162 20090602
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/26
Abstract:
Provided is a test system of a semiconductor integrated circuit including an output device and an input device for conducting an input/output characteristics test of the output device and the input device inside the semiconductor integrated circuit. In the system, a transmission line provided in a test board where the semiconductor integrated circuit is mounted on establishes a wired connection between an external terminal of one circuit of one of the output device and the input device and external terminals of a plurality of circuits of another one of the output device and the input device.
Public/Granted literature
- US20100301895A1 Test system and test method of semiconductor integrated circuit Public/Granted day:2010-12-02
Information query
