Invention Grant
- Patent Title: ULSI micro-interconnect member having ruthenium electroplating layer on barrier layer
- Patent Title (中): ULSI微互连构件在阻挡层上具有钌电镀层
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Application No.: US12735187Application Date: 2009-01-08
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Publication No.: US08390123B2Publication Date: 2013-03-05
- Inventor: Junnosuke Sekiguchi , Toru Imori , Takashi Kinase
- Applicant: Junnosuke Sekiguchi , Toru Imori , Takashi Kinase
- Applicant Address: JP Minato-ku, Tokyo
- Assignee: Nippon Mining & Metals Co., Ltd.
- Current Assignee: Nippon Mining & Metals Co., Ltd.
- Current Assignee Address: JP Minato-ku, Tokyo
- Agency: Flynn, Thiel, Boutell & Tanis, P.C.
- Priority: JP2008-012522 20080123
- International Application: PCT/JP2009/050112 WO 20090108
- International Announcement: WO2009/093483 WO 20090730
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A ULSI micro-interconnect member having a substrate and a ULSI micro-interconnect formed on the substrate, wherein the ULSI micro-interconnect includes a barrier layer formed on the substrate and a ruthenium electroplating layer formed on the barrier layer; the ULSI micro-interconnect member further including a copper electroplating layer formed using the ruthenium electroplating layer as a seed layer; and a process for fabricating the ULSI micro-interconnect members.
Public/Granted literature
- US20100314766A1 ULSI MICRO-INTERCONNECT MEMBER HAVING RUTHENIUM ELECTROPLATING LAYER ON BARRIER LAYER Public/Granted day:2010-12-16
Information query
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