Apparatuses are disclosed, such as those involving integrated circuit packaging. In one embodiment, a chip package includes: an encapsulation having a top surface and a bottom surface facing away from the top surface. The package further includes a leadframe including a plurality of leads. Each of the leads includes an exposed portion exposed through one of edges of the bottom surface of the encapsulation. The exposed portion has a length. At least one of exposed portions positioned along one of the edges of the bottom surface of the encapsulation has a length different from other exposed portions along the edge. The package can also include a dummy pad exposed through a corner of the bottom surface. The configuration can enhance solder joint reliability of the package when the package is attached to a printed circuit board.