Invention Grant
US08390081B2 MOS P-N junction diode device and method for manufacturing the same
有权
MOS P-N结二极管器件及其制造方法
- Patent Title: MOS P-N junction diode device and method for manufacturing the same
- Patent Title (中): MOS P-N结二极管器件及其制造方法
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Application No.: US12427223Application Date: 2009-04-21
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Publication No.: US08390081B2Publication Date: 2013-03-05
- Inventor: Kuo-Liang Chao , Hung-Hsin Kuo , Tse-Chuan Su
- Applicant: Kuo-Liang Chao , Hung-Hsin Kuo , Tse-Chuan Su
- Applicant Address: TW Taipei
- Assignee: PFC Device Corp.
- Current Assignee: PFC Device Corp.
- Current Assignee Address: TW Taipei
- Agency: WPAT PC
- Agent Justin King
- Priority: TW97114725A 20080422
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
A MOS P-N junction diode device includes a substrate having a first conductivity type, a field oxide structure defining a trench structure, a gate structure formed in the trench structure and a doped region having a second conductivity type adjacent to the gate structure in the substrate. The method for manufacturing such diode device includes several ion-implanting steps. After the gate structure is formed by isotropic etching using a patterned photo-resist layer as a mask, an ion-implanting step is performed using the patterned photo-resist layer as a mask to form a deeper doped sub-region. Then, another ion-implanting step is performed using the gate structure as a mask to form a shallower doped sub-region between the gate structure and the deeper doped sub-region. The formed MOS P-N junction diode device has low forward voltage drop, low reverse leakage current, fast reverse recovery time and high reverse voltage tolerance.
Public/Granted literature
- US20090261427A1 MOS P-N JUNCTION DIODE DEVICE AND METHOD FOR MANUFACTURING THE SAME Public/Granted day:2009-10-22
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