Invention Grant
- Patent Title: Semiconductor nanowire memory device
- Patent Title (中): 半导体纳米线存储器件
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Application No.: US12881593Application Date: 2010-09-14
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Publication No.: US08390066B2Publication Date: 2013-03-05
- Inventor: Hideyuki Nishizawa , Satoshi Itoh
- Applicant: Hideyuki Nishizawa , Satoshi Itoh
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2010-057549 20100315
- Main IPC: H01L27/11
- IPC: H01L27/11 ; H01L27/12

Abstract:
According to an embodiment, a semiconductor memory device capable of stably operating even when an element is shrunk is provided. The semiconductor memory device of the embodiment includes: first and second diodes serially connected between power sources of two different potentials, formed by nanowires, and exhibiting negative differential resistances; and a select transistor connected between the first diode and the second diode. The nanowires are preferably silicon nanowires. The thickness of the silicon nanowires is preferably 8 nm or less.
Public/Granted literature
- US20110220876A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2011-09-15
Information query
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