Invention Grant
US08390056B2 Non-volatile semiconductor memory device with intrinsic charge trapping layer
有权
具有固有电荷俘获层的非易失性半导体存储器件
- Patent Title: Non-volatile semiconductor memory device with intrinsic charge trapping layer
- Patent Title (中): 具有固有电荷俘获层的非易失性半导体存储器件
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Application No.: US13253083Application Date: 2011-10-05
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Publication No.: US08390056B2Publication Date: 2013-03-05
- Inventor: Hau-Yan Lu , Shih-Chen Wang , Ching-Sung Yang
- Applicant: Hau-Yan Lu , Shih-Chen Wang , Ching-Sung Yang
- Applicant Address: TW Hsinchu Science Park, Hsin-Chu
- Assignee: eMemory Technology Inc.
- Current Assignee: eMemory Technology Inc.
- Current Assignee Address: TW Hsinchu Science Park, Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H01L29/788
- IPC: H01L29/788
Abstract:
A non-volatile semiconductor memory device includes a substrate, a first gate formed on a first region of a surface of the substrate, a second gate formed on a second region of the surface of the substrate, a charge storage layer filled between the first gate and the second gate, a first diffusion region formed on a first side of the charge storage layer, and a second diffusion region formed opposite the charge storage layer from the first diffusion region. The first region and the second region are separated by a distance sufficient for forming a self-aligning charge storage layer therebetween.
Public/Granted literature
- US20120018794A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE WITH INTRINSIC CHARGE TRAPPING LAYER Public/Granted day:2012-01-26
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