Invention Grant
- Patent Title: Massively parallel interconnect fabric for complex semiconductor devices
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Application No.: US12436235Application Date: 2009-05-06
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Publication No.: US08390035B2Publication Date: 2013-03-05
- Inventor: Majid Bemanian , Farhang Yazdani
- Applicant: Majid Bemanian , Farhang Yazdani
- Agency: MaxValueIP LLC
- Main IPC: H01L23/52
- IPC: H01L23/52

Abstract:
An embodiment of this invention uses a massive parallel interconnect fabric (MPIF) at the flipped interface of a core die substrate (having the core logic blocks) and a context die (used for in circuit programming/context/customization of the core die substrate), to produce ASIC-like density and FPGA-like flexibility/programmability, while reducing the time and cost for development and going from prototyping to production, reducing cost per die, reducing or eliminating NRE, and increasing performance. Other embodiments of this invention enable debugging complex SoC through large contact points provided through the MPIF, provide for multi-platform functionality, and enable incorporating FGPA core in ASIC platform through the MPIF.
Public/Granted literature
- US20100283085A1 Massively Parallel Interconnect Fabric for Complex Semiconductor Devices Public/Granted day:2010-11-11
Information query
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