Invention Grant
- Patent Title: Stacked wafer manufacturing method
- Patent Title (中): 堆叠晶圆制造方法
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Application No.: US13088591Application Date: 2011-04-18
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Publication No.: US08389386B2Publication Date: 2013-03-05
- Inventor: Akihito Kawai , Koichi Kondo
- Applicant: Akihito Kawai , Koichi Kondo
- Applicant Address: JP Tokyo
- Assignee: Disco Corporation
- Current Assignee: Disco Corporation
- Current Assignee Address: JP Tokyo
- Agency: Greer, Burns & Crain, Ltd.
- Priority: JP2010-096840 20100420
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A manufacturing method for a stacked wafer configured by bonding a mother wafer having a plurality of first semiconductor device and a stacking wafer having a plurality of second semiconductor devices. The manufacturing method includes the steps of attaching a protective member to the front side of the stacking wafer to protect the second semiconductor devices, next grinding the back side of the stacking wafer, next bonding the front side of a reinforcing wafer through a bonding layer to the back side of the stacking wafer, next dividing the stacking wafer together with the reinforcing wafer into the plural second semiconductor devices, next bonding the front side of each second semiconductor device to the front side of the mother wafer to thereby connect the electrodes of each second semiconductor device to the electrodes of the corresponding first semiconductor device of the mother wafer, and finally grinding the reinforcing wafer bonded to the back side of each second semiconductor device to thereby remove the reinforcing wafer.
Public/Granted literature
- US20110256667A1 STACKED WAFER MANUFACTURING METHOD Public/Granted day:2011-10-20
Information query
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