Invention Grant
- Patent Title: Circuit for and method of reducing power consumption in input ports of an integrated circuit
- Patent Title (中): 降低集成电路输入端口功耗的电路及方法
-
Application No.: US12361014Application Date: 2009-01-28
-
Publication No.: US08384472B2Publication Date: 2013-02-26
- Inventor: Ionut C. Cical , Edward Cullen
- Applicant: Ionut C. Cical , Edward Cullen
- Applicant Address: US CA San Jose
- Assignee: Xilinx, Inc.
- Current Assignee: Xilinx, Inc.
- Current Assignee Address: US CA San Jose
- Agent John J. King
- Main IPC: G05F1/10
- IPC: G05F1/10 ; G05F3/02

Abstract:
A circuit for reducing power consumption in input ports of an integrated circuit is disclosed. The circuit comprises a plurality of receiver circuits of the integrated circuit for receiving input signals coupled to the integrated circuit; and a bias current generator coupled to the plurality of receiver circuits, the bias current generator providing a bias voltage for each receiver circuit of the plurality of receiver circuits to mirror the current in the bias current generator in each of the receiver circuits. A method of reducing power consumption in input ports of an integrated circuit is also disclosed.
Public/Granted literature
- US20100188142A1 CIRCUIT FOR AND METHOD OF REDUCING POWER CONSUMPTION IN INPUT PORTS OF AN INTEGRATED CIRCUIT Public/Granted day:2010-07-29
Information query
IPC分类: