Invention Grant
US08384472B2 Circuit for and method of reducing power consumption in input ports of an integrated circuit 有权
降低集成电路输入端口功耗的电路及方法

  • Patent Title: Circuit for and method of reducing power consumption in input ports of an integrated circuit
  • Patent Title (中): 降低集成电路输入端口功耗的电路及方法
  • Application No.: US12361014
    Application Date: 2009-01-28
  • Publication No.: US08384472B2
    Publication Date: 2013-02-26
  • Inventor: Ionut C. CicalEdward Cullen
  • Applicant: Ionut C. CicalEdward Cullen
  • Applicant Address: US CA San Jose
  • Assignee: Xilinx, Inc.
  • Current Assignee: Xilinx, Inc.
  • Current Assignee Address: US CA San Jose
  • Agent John J. King
  • Main IPC: G05F1/10
  • IPC: G05F1/10 G05F3/02
Circuit for and method of reducing power consumption in input ports of an integrated circuit
Abstract:
A circuit for reducing power consumption in input ports of an integrated circuit is disclosed. The circuit comprises a plurality of receiver circuits of the integrated circuit for receiving input signals coupled to the integrated circuit; and a bias current generator coupled to the plurality of receiver circuits, the bias current generator providing a bias voltage for each receiver circuit of the plurality of receiver circuits to mirror the current in the bias current generator in each of the receiver circuits. A method of reducing power consumption in input ports of an integrated circuit is also disclosed.
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