A driving circuit for a display with display elements in rows and/or columns has a shift register, through which tokens are shifted. The shift register's parallel outputs are latched and enable switch cells depending on the tokens. Control signals are supplied to the switch cells which control the output signal in terms of pulse width and/or signal shape. Buffers output the signals to a connected display. Individual or groups of buffers are connected to different supply voltages. The shift register may have more than one input in order to allow for shifting tokens in parallel, e.g. to every second output, using only one clock cycle. Further, inputs are provided for inverting the travelling direction of the tokens, inverting the shape of the signal that is output or switching all outputs to a predetermined state.