Invention Grant
- Patent Title: In-process system level test before surface mount
- Patent Title (中): 表面贴装前的进程内系统级测试
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Application No.: US11900615Application Date: 2007-09-11
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Publication No.: US08368416B2Publication Date: 2013-02-05
- Inventor: Marc E. King , Kwok Leung Adam Chan , Yufang Wang
- Applicant: Marc E. King , Kwok Leung Adam Chan , Yufang Wang
- Applicant Address: US CA Santa Clara
- Assignee: NVIDIA Corporation
- Current Assignee: NVIDIA Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: G01R31/02
- IPC: G01R31/02 ; G01R31/28 ; H01L21/66

Abstract:
Methods and systems for testing an integrated circuit during an assembly process are described. The integrated circuit is received from inventory. The integrated circuit is placed in a socket on a first circuit board for system-level testing. The system-level testing is performed prior to placement and permanent attachment of the integrated circuit onto a second circuit board. Provided the integrated circuit passes the system-level testing, the placement and permanent attachment of the integrated circuit to the second circuit board is the next step following the system-level testing in the assembly process.
Public/Granted literature
- US20080001618A1 In-process system level test before surface mount Public/Granted day:2008-01-03
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