Invention Grant
US08368383B2 Method for testing a variable digital delay line and a device having variable digital delay line testing capabilities
有权
用于测试可变数字延迟线的方法和具有可变数字延迟线测试能力的器件
- Patent Title: Method for testing a variable digital delay line and a device having variable digital delay line testing capabilities
- Patent Title (中): 用于测试可变数字延迟线的方法和具有可变数字延迟线测试能力的器件
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Application No.: US12522034Application Date: 2007-01-05
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Publication No.: US08368383B2Publication Date: 2013-02-05
- Inventor: Yefim-Haim Fefer , Mikhail Bourgart , Segey Sofer , Yoav Weizman
- Applicant: Yefim-Haim Fefer , Mikhail Bourgart , Segey Sofer , Yoav Weizman
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- International Application: PCT/IB2007/050035 WO 20070105
- International Announcement: WO2008/081347 WO 20080710
- Main IPC: H03L7/06
- IPC: H03L7/06 ; H03K3/00 ; G01R31/28

Abstract:
A device and a method for testing a variable digital delay line that includes multiple taps. The method includes providing, an input signal to the variable digital delay line and finding, for each tap out of a group of tested taps of the variable digital delay line, a variable delay unit configuration that provides a delay that is closest to a delay introduced by the tap; wherein the variable digital delay line and the variable delay unit belong to the same integrated circuit.
Public/Granted literature
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