Invention Grant
- Patent Title: Method for manufacturing printed wiring board and electrolytic etching solution for use in the manufacturing method
- Patent Title (中): 用于制造方法的印刷线路板和电解蚀刻溶液的制造方法
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Application No.: US12222995Application Date: 2008-08-21
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Publication No.: US08366903B2Publication Date: 2013-02-05
- Inventor: Toshinori Kawamura , Haruo Akahoshi , Kunio Arai
- Applicant: Toshinori Kawamura , Haruo Akahoshi , Kunio Arai
- Applicant Address: JP Kangawa
- Assignee: Hitachi Via Mechanics
- Current Assignee: Hitachi Via Mechanics
- Current Assignee Address: JP Kangawa
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Priority: JP2007-256528 20070928
- Main IPC: H05K3/07
- IPC: H05K3/07

Abstract:
In a method of manufacturing a printed wiring board, a via reaches from a surface copper layer to an inner-layer copper layer of a multilayer board, and copper layers and insulating layers are alternately layered. The wiring board is machined by a laser, and a process of machining the via includes forming a laser absorbing layer on a surface of a copper layer disposed on the surface of the multilayer board. The laser is irradiated, and an electrolytic etching and removal of the laser absorbing layer is carried out in this order.
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