Invention Grant
US08347150B2 Method and semiconductor memory with a device for detecting addressing errors
有权
方法和半导体存储器，用于检测寻址错误的装置
- Patent Title: Method and semiconductor memory with a device for detecting addressing errors
- Patent Title (中): 方法和半导体存储器，用于检测寻址错误的装置
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Application No.: US12517654Application Date: 2007-12-05
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Publication No.: US08347150B2Publication Date: 2013-01-01
- Inventor: Lukusa Didier Kabulepa , Houman Amjadi , Wolfgang Fey , Adrian Traskov
- Applicant: Lukusa Didier Kabulepa , Houman Amjadi , Wolfgang Fey , Adrian Traskov
- Applicant Address: DE
- Assignee: Continental Teves AG & Co., oHG
- Current Assignee: Continental Teves AG & Co., oHG
- Current Assignee Address: DE
- Agency: RatnerPrestia
- Priority: DE102006057700 20061207; DE102007058928 20071205
- International Application: PCT/EP2007/063367 WO 20071205
- International Announcement: WO2008/068290 WO 20080612
- Main IPC: G06F11/26
- IPC: G06F11/26 ; G06F11/00
Abstract:
A semiconductor memory and a data processing system having hardware for carrying out a method for the improved internal monitoring of addressing circuits in semiconductor memories or in a data processing system, in which logic levels addressing lines are tapped off, the actually selected address or subaddress is represented by additional address bit lines, the actually accessed address/subaddress is recovered using the address bit lines, and the actually selected address/subaddress is compared with the applied address/subaddress, obtained from the additional address bit lines, in order to recognize an error in the addressing circuit.
Public/Granted literature
- US20100107006A1 Method and Semiconductor Memory With A Device For Detecting Addressing Errors Public/Granted day:2010-04-29
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