Invention Grant
US08284820B2 Shared processor architecture applied to functional stages configured in a receiver system for processing signals from different transmitter systems and method thereof
有权
应用于在接收机系统中配置用于处理来自不同发射机系统的信号的功能级的共享处理器架构及其方法
- Patent Title: Shared processor architecture applied to functional stages configured in a receiver system for processing signals from different transmitter systems and method thereof
- Patent Title (中): 应用于在接收机系统中配置用于处理来自不同发射机系统的信号的功能级的共享处理器架构及其方法
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Application No.: US11873415Application Date: 2007-10-17
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Publication No.: US08284820B2Publication Date: 2012-10-09
- Inventor: Chun-Nan Chen , Jia-Horng Shieh
- Applicant: Chun-Nan Chen , Jia-Horng Shieh
- Applicant Address: TW Science-Based Industrial Park, Hsin-Chu
- Assignee: Mediatek Inc.
- Current Assignee: Mediatek Inc.
- Current Assignee Address: TW Science-Based Industrial Park, Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H04B1/709
- IPC: H04B1/709
Abstract:
According to an embodiment of the present invention, a shared processor architecture in a receiver system is disclosed. The receiver system is configured to have a first functional stage and a second functional stage for processing information carried by signals from a first transmitter system and a second transmitter system respectively. The first functional stage and the second functional stage correspond to an identical signal processing function. The shared processor architecture includes a first processor, allocated to the first functional stage and the second functional stage, for processing an output generated from the first functional stage or an output from the second functional stage.
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