Invention Grant
US08261167B1 Cyclically interleaved dual BCH, with simultaneous decode and per-codeword maximum likelihood reconciliation 有权
循环交织双BCH,具有同时解码和每码字最大似然协调

  • Patent Title: Cyclically interleaved dual BCH, with simultaneous decode and per-codeword maximum likelihood reconciliation
  • Patent Title (中): 循环交织双BCH,具有同时解码和每码字最大似然协调
  • Application No.: US12720487
    Application Date: 2010-03-09
  • Publication No.: US08261167B1
    Publication Date: 2012-09-04
  • Inventor: Phil Northcott
  • Applicant: Phil Northcott
  • Applicant Address: US CA Santa Clara
  • Assignee: PMC-Sierra US, Inc.
  • Current Assignee: PMC-Sierra US, Inc.
  • Current Assignee Address: US CA Santa Clara
  • Agency: Borden Ladner Gervais LLP
  • Agent Curtis B. Behmann
  • Main IPC: H03M13/00
  • IPC: H03M13/00 H03M13/03
Cyclically interleaved dual BCH, with simultaneous decode and per-codeword maximum likelihood reconciliation
Abstract:
A method and system are provided for forward error correction. Embodiments of the present disclosure provide a strong FEC algorithm that performs similarly to RS(255,239) when a simple decoder is used, and scales up linearly to a full-scale decoder that outperforms all 7% algorithms currently in G.975.1. The Forward Error Correction code is suitable for use in optical transport networks (OTN) and other applications requiring high decode performance and high code rate. Embodiments of the present disclosure provide an FEC code that is a cyclically interleaved dual BCH, with simultaneous decode and per-codeword maximum likelihood reconciliation.
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