Systems and methods for improving the performance and reliability of flash memory solid state drive devices are described herein. A flash memory array component stores data. A memory hierarchy component transfers data between the host and the flash memory array component. The memory hierarchy component includes a level one (“L1”) cache coupled to a merge buffer, the flash memory array component, and the host. The merge buffer is coupled to the flash memory array component. The L1 cache and merge buffer include volatile memory, and the host is coupled to the merge buffer and flash memory array component. The memory hierarchy component includes a write component and a read component. The write component writes data to at least one of the L1 cache, merge buffer, or flash memory array component. The read component reads data from at least one of the L1 cache, merge buffer, or flash memory array component.