Invention Grant
- Patent Title: Method of manufacturing a semiconductor device including epitaxially growing semiconductor epitaxial layers on a surface of semiconductor substrate
- Patent Title (中): 在半导体衬底的表面上制造包括外延生长半导体外延层的半导体器件的方法
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Application No.: US12541279Application Date: 2009-08-14
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Publication No.: US08258576B2Publication Date: 2012-09-04
- Inventor: Hiroyuki Ohta
- Applicant: Hiroyuki Ohta
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Semiconductor Limited
- Current Assignee: Fujitsu Semiconductor Limited
- Current Assignee Address: JP Yokohama
- Agency: Westerman, Hattori, Daniels & Adrian, LLP
- Priority: JP2006-290773 20061026
- Main IPC: H01L27/12
- IPC: H01L27/12

Abstract:
A semiconductor device has a first MOS transistor formed on first active region of the first conductivity type, having first gate electrode structure, first source/drain regions, recesses formed in the first source/drain regions, and semiconductor buried regions buried and grown on the recesses for applying stress to the channel under the first gate electrode structure, and a second MOS transistor formed on second active region of the second conductivity type, having second gate electrode structure, second source/drain regions, and semiconductor epitaxial layers formed on the second source/drain regions without forming recesses and preferably applying stress to the channel under the second gate electrode structure. In a CMOS device, performance can be improved by utilizing stress and manufacture processes can be simplified.
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