Invention Grant
- Patent Title: Semiconductor device
- Patent Title (中): 半导体器件
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Application No.: US12984142Application Date: 2011-01-04
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Publication No.: US08237281B2Publication Date: 2012-08-07
- Inventor: Koji Takemura , Hiroshige Hirano , Yutaka Itoh , Hikari Sano , Masao Takahashi , Koji Koike
- Applicant: Koji Takemura , Hiroshige Hirano , Yutaka Itoh , Hikari Sano , Masao Takahashi , Koji Koike
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2005-176824 20050616
- Main IPC: H01L23/495
- IPC: H01L23/495

Abstract:
A semiconductor device includes at least three or more wiring layers stacked in an interlayer insulating film on a semiconductor substrate, a seal ring provided at the outer periphery of a chip region of the semiconductor substrate and a chip strength reinforcement provided in part of the chip region near the seal ring. The chip strength reinforcement is made of a plurality of dummy wiring structures and each of the plurality of dummy wiring structures is formed to extend across and within two or more of the wiring layers including one or none of the bottommost wiring layer and the topmost wiring layer using a via portion.
Public/Granted literature
- US20110095430A1 SEMICONDUCTOR DEVICE Public/Granted day:2011-04-28
Information query
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