Invention Grant
- Patent Title: Semiconductor device and method of manufacturing the same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US12658825Application Date: 2010-02-16
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Publication No.: US08237222B2Publication Date: 2012-08-07
- Inventor: Ayako Inoue , Naoto Saitoh
- Applicant: Ayako Inoue , Naoto Saitoh
- Applicant Address: JP
- Assignee: Seiko Instruments Inc.
- Current Assignee: Seiko Instruments Inc.
- Current Assignee Address: JP
- Agency: Adams & Wilks
- Priority: JP2009-039344 20090223
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/336

Abstract:
In a method of manufacturing a high withstanding voltage MOSFET, a region to be doped with impurities and a region to be doped with no impurity are provided when ion implantation of the impurities is performed in the channel forming region, for controlling a threshold voltage. The region to be doped with no impurity is suitably patterned so that impurity concentration of the channel forming region near boundaries between a well region and a source region and between the well region and a drain region having the same conductivity type as the well region may be increased, to thereby induce a reverse short channel effect. By canceling a short channel effect with the reverse short channel effect induced by the above-mentioned method, the short channel effect of the high withstanding voltage MOSFET may be suppressed.
Public/Granted literature
- US20100219472A1 Semiconductor device and method of manufacturing the same Public/Granted day:2010-09-02
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