Invention Grant
- Patent Title: Memory arrays having substantially vertical, adjacent semiconductor structures and the formation thereof
- Patent Title (中): 存储器阵列具有基本垂直的相邻半导体结构及其形成
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Application No.: US12836853Application Date: 2010-07-15
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Publication No.: US08237213B2Publication Date: 2012-08-07
- Inventor: Zengtao Liu
- Applicant: Zengtao Liu
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Leffert Jay & Polglaze, P.A.
- Main IPC: H01L29/792
- IPC: H01L29/792 ; H01L21/8239

Abstract:
Memory arrays and methods of their formation are disclosed. One such memory array has memory-cell strings are formed adjacent to separated substantially vertical, adjacent semiconductor structures, where the separated semiconductor structures couple the memory cells of the respective strings in series. For some embodiments, two dielectric pillars may be formed from a dielectric formed in a single opening, where each of the dielectric pillars has a pair of memory-cell strings adjacent thereto and where at least one memory cell of one of the strings on one of the pillars and at least one memory cell of one of the strings on the other pillar are commonly coupled to an access line.
Public/Granted literature
- US20120012921A1 MEMORY ARRAYS HAVING SUBSTANTIALLY VERTICAL, ADJACENT SEMICONDUCTOR STRUCTURES AND THE FORMATION THEREOF Public/Granted day:2012-01-19
Information query
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