Invention Grant
- Patent Title: Semiconductor device
- Patent Title (中): 半导体器件
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Application No.: US12536319Application Date: 2009-08-05
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Publication No.: US08237203B2Publication Date: 2012-08-07
- Inventor: Nobuhiro Tsuda , Hidekatsu Nishimaki , Hiroshi Omura , Yuko Yoshifuku
- Applicant: Nobuhiro Tsuda , Hidekatsu Nishimaki , Hiroshi Omura , Yuko Yoshifuku
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: McDermott Will & Emery LLP
- Priority: JP2008-210332 20080819; JP2009-026135 20090206
- Main IPC: H01L27/088
- IPC: H01L27/088

Abstract:
A pMIS region is provided between a boundary extending in a first direction and passing through each of a plurality of standard cells and a first peripheral edge. An nMIS region is provided between the boundary and a second peripheral edge. A power supply wiring and a grounding wiring extend along the first and second peripheral edges, respectively. A plurality of pMIS wirings and a plurality of nMIS wirings are arranged on a plurality of first virtual lines and a plurality of second virtual lines, respectively, extending in the first direction and arranged with a single pitch in a second direction. The first virtual line that is the closest to the boundary and the second virtual line that is the closest to the boundary have therebetween a spacing larger than the single pitch.
Public/Granted literature
- US20100044755A1 SEMICONDUCTOR DEVICE Public/Granted day:2010-02-25
Information query
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