Invention Grant
- Patent Title: Transistor and method for fabricating the same
- Patent Title (中): 晶体管及其制造方法
-
Application No.: US11965708Application Date: 2007-12-27
-
Publication No.: US08236696B2Publication Date: 2012-08-07
- Inventor: Jun-Hee Cho
- Applicant: Jun-Hee Cho
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Kipatrick Townsend & Stockton LLP
- Priority: KR10-2007-0026514 20070319
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/306

Abstract:
A method for fabricating a semiconductor device to enlarge a channel region is provided. The channel region is enlarged due to having pillar shaped sidewalls of a transistor. The transistor includes a fin active region vertically protruding on a substrate, an isolation layer enclosing a lower portion of the fin active region, and a gate electrode crossing the fin active region and covering a portion of the fin active region. An isolation layer is formed enclosing a lower portion of the fin active region and the isolation layer under the spacers is partially removed to expose a portion of the sidewalls of the fin active region. Subsequently, dry etching is performed to form the sidewalls having a pillar/neck.
Public/Granted literature
- US20080230832A1 TRANSISTOR AND METHOD FOR FABRICATING THE SAME Public/Granted day:2008-09-25
Information query
IPC分类: