Invention Grant
US08236654B2 Reduction of threshold voltage variation in transistors comprising a channel semiconductor alloy by reducing deposition non-uniformities
有权
通过减少沉积不均匀性来减少包括沟道半导体合金的晶体管中的阈值电压变化
- Patent Title: Reduction of threshold voltage variation in transistors comprising a channel semiconductor alloy by reducing deposition non-uniformities
- Patent Title (中): 通过减少沉积不均匀性来减少包括沟道半导体合金的晶体管中的阈值电压变化
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Application No.: US12637112Application Date: 2009-12-14
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Publication No.: US08236654B2Publication Date: 2012-08-07
- Inventor: Stephan Kronholz , Andreas Ott
- Applicant: Stephan Kronholz , Andreas Ott
- Applicant Address: US TX Austin
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US TX Austin
- Agency: Williams, Morgan & Amerson
- Priority: DE102008063402 20081231
- Main IPC: H01L21/8234
- IPC: H01L21/8234 ; H01L21/336

Abstract:
A threshold adjusting semiconductor material, such as a silicon/germanium alloy, may be provided selectively for one type of transistors on the basis of enhanced deposition uniformity. For this purpose, the semiconductor alloy may be deposited on the active regions of any transistors and may subsequently be patterned on the basis of a highly controllable patterning regime. Consequently, threshold variability may be reduced.
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