Invention Grant
US08236640B2 Method of fabricating a semiconductor device having gate finger elements extended over a plurality of isolation regions formed in the source and drain regions
有权
制造半导体器件的方法，该半导体器件具有延伸在形成于源极和漏极区域中的多个隔离区域上的栅极指状元件
- Patent Title: Method of fabricating a semiconductor device having gate finger elements extended over a plurality of isolation regions formed in the source and drain regions
- Patent Title (中): 制造半导体器件的方法，该半导体器件具有延伸在形成于源极和漏极区域中的多个隔离区域上的栅极指状元件
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Application No.: US12642604Application Date: 2009-12-18
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Publication No.: US08236640B2Publication Date: 2012-08-07
- Inventor: Michael Andrew Smith
- Applicant: Michael Andrew Smith
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
Embodiments of the present invention describe a semiconductor device implementing the reduced-surface-field (RESURF) effect. The semiconductor device comprises a source/drain region having a plurality of isolation regions interleaved with source/drain extension regions. A gate electrode is formed on the semiconductor device, where the gate electrode includes gate finger elements formed over the isolation regions to induce capacitive coupling. The gate finger elements enhance the depletion of the source/drain extension regions, thus inducing a higher breakdown voltage.
Public/Granted literature
- US20110147844A1 SEMICONDUCTOR DEVICE WITH REDUCED SURFACE FIELD EFFECT AND METHODS OF FABRICATION THE SAME Public/Granted day:2011-06-23
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