Invention Grant
US08236608B2 Stacking package structure with chip embedded inside and die having through silicon via and method of the same
有权
堆叠封装结构,其芯片嵌入内部并具有通过硅芯片的芯片及其方法
- Patent Title: Stacking package structure with chip embedded inside and die having through silicon via and method of the same
- Patent Title (中): 堆叠封装结构,其芯片嵌入内部并具有通过硅芯片的芯片及其方法
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Application No.: US13093226Application Date: 2011-04-25
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Publication No.: US08236608B2Publication Date: 2012-08-07
- Inventor: Wen-Kun Yang
- Applicant: Wen-Kun Yang
- Applicant Address: BV Road Town
- Assignee: King Dragon International Inc.
- Current Assignee: King Dragon International Inc.
- Current Assignee Address: BV Road Town
- Agency: Ditthavong Mori & Steiner, P.C.
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
The semiconductor device package structure includes a first die with a through silicon via (TSV) open from back side of the first die to expose bonding pads; a build up layer coupled between the bonding pads to terminal metal pads by the through silicon via (TSV); a substrate with a second die embedded inside and top circuit wiring and bottom circuit wiring on top and bottom side of the substrate respectively; and a conductive through hole structure coupled between the terminal metal pads to the top circuit wiring and the bottom circuit wiring.
Public/Granted literature
Information query
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