Invention Grant
US08236608B2 Stacking package structure with chip embedded inside and die having through silicon via and method of the same 有权
堆叠封装结构,其芯片嵌入内部并具有通过硅芯片的芯片及其方法

Stacking package structure with chip embedded inside and die having through silicon via and method of the same
Abstract:
The semiconductor device package structure includes a first die with a through silicon via (TSV) open from back side of the first die to expose bonding pads; a build up layer coupled between the bonding pads to terminal metal pads by the through silicon via (TSV); a substrate with a second die embedded inside and top circuit wiring and bottom circuit wiring on top and bottom side of the substrate respectively; and a conductive through hole structure coupled between the terminal metal pads to the top circuit wiring and the bottom circuit wiring.
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