Invention Grant
US08236606B2 Method and system for providing a low-profile semiconductor assembly 有权
用于提供低调半导体组件的方法和系统

  • Patent Title: Method and system for providing a low-profile semiconductor assembly
  • Patent Title (中): 用于提供低调半导体组件的方法和系统
  • Application No.: US12829569
    Application Date: 2010-07-02
  • Publication No.: US08236606B2
    Publication Date: 2012-08-07
  • Inventor: Michael G. Lee
  • Applicant: Michael G. Lee
  • Applicant Address: JP Kawasaki
  • Assignee: Fujitsu Limited
  • Current Assignee: Fujitsu Limited
  • Current Assignee Address: JP Kawasaki
  • Agency: Baker Botts L.L.P.
  • Main IPC: H01L21/44
  • IPC: H01L21/44
Method and system for providing a low-profile semiconductor assembly
Abstract:
A semiconductor assembly is provided that includes a substrate that has a first surface. A chip is coupled to the substrate. The chip has a second surface that faces the first surface of the substrate. The chip is spaced apart from the substrate forming a gap. At least a portion of the substrate is coupled to the chip by solder bumps. The solder bumps include a deformable material, such that as a height of the gap between the chip and the substrate increases, the solder bumps deform into a stretched state. An underfill material is applied between the substrate and the chip. The underfill material substantially fills the gap between the chip and the substrate and surrounds the solder bumps in the stretched state. Barricades comprising non-conductive protrusions are disposed between the first surface of the substrate and the second surface of the chip. The barricades confine the solder bumps in a compressed state.
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