Invention Grant
- Patent Title: Handling multi-cycle integer operations for a multi-threaded processor
- Patent Title (中): 处理多线程处理器的多循环整数运算
-
Application No.: US11927177Application Date: 2007-10-29
-
Publication No.: US08195919B1Publication Date: 2012-06-05
- Inventor: Christopher H. Olson , Robert T. Golla , Manish Shah , Jeffrey S. Brooks
- Applicant: Christopher H. Olson , Robert T. Golla , Manish Shah , Jeffrey S. Brooks
- Applicant Address: US CA Redwood City
- Assignee: Oracle America, Inc.
- Current Assignee: Oracle America, Inc.
- Current Assignee Address: US CA Redwood City
- Agency: Polsinelli Shughart PC
- Main IPC: G06F13/00
- IPC: G06F13/00

Abstract:
Determining an effective address of a memory with a three-operand add operation in single execution cycle of a multithreaded processor that can access both segmented memory and non-segmented memory. During that cycle, the processor determines whether a memory segment base is zero. If the segment base is zero, the processor can access a memory location at the effective address without adding the segment base. If the segment base is not zero, such as when executing legacy code, the processor consumes another cycle to add the segment base to the effective address. Similarly, the processor consumes another cycle if the effective address or the linear address is misaligned. An integer execution unit that performs the three-operand add using a carry-save adder coupled to a carry look-ahead adder. If the segment base is not zero, the effective address is fed back through the integer execution unit to add the segment base.
Information query