Invention Grant
US08195735B2 System and method to implement a matrix multiply unit of a broadband processor 失效
实现宽带处理器的矩阵乘法单元的系统和方法

System and method to implement a matrix multiply unit of a broadband processor
Abstract:
The present invention provides a system and method for improving the performance of general-purpose processors by implementing a functional unit that computes the product of a matrix operand with a vector operand, producing a vector result. The functional unit fully utilizes the entire resources of a 128b by 128b multiplier regardless of the operand size, as the number of elements of the matrix and vector operands increase as operand size is reduced. The unit performs both fixed-point and floating-point multiplications and additions with the highest-possible intermediate accuracy with modest resources.
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