Invention Grant
US08194744B2 Method and/or apparatus for implementing reduced bandwidth high performance VC1 intensity compensation
有权
用于实现减少带宽高性能VC1强度补偿的方法和/或装置
- Patent Title: Method and/or apparatus for implementing reduced bandwidth high performance VC1 intensity compensation
- Patent Title (中): 用于实现减少带宽高性能VC1强度补偿的方法和/或装置
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Application No.: US11524125Application Date: 2006-09-20
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Publication No.: US08194744B2Publication Date: 2012-06-05
- Inventor: Eric C. Pearson , Anthony Peter Joch
- Applicant: Eric C. Pearson , Anthony Peter Joch
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Agent Christopher P. Maiorana, PC
- Main IPC: H04N7/12
- IPC: H04N7/12
Abstract:
An apparatus comprising a first circuit, a second circuit and a third circuit is disclosed. The first circuit may be configured to generate an output signal and one or more motion vectors in response to (i) a bitstream signal and (ii) a predictor signal. The second circuit may be configured to generate one or more reference data pixels in response to an address signal and the output signal. The third circuit may be configured to generate the predictor signal and address signal in response to (i) the motion vectors and (ii) the reference data pixels.
Public/Granted literature
- US20080069219A1 Method and/or apparatus for implementing reduced bandwidth high performance VC1 intensity compensation Public/Granted day:2008-03-20
Information query
