Invention Grant
US08194486B2 Semiconductor memory devices having bit lines 有权
具有位线的半导体存储器件

Semiconductor memory devices having bit lines
Abstract:
A semiconductor device includes a bit line connected to a plurality of memory cells in a memory block and a sense amplifier having a first node connected to the bit line and a second node, which is not connected to any bit line. The second node has a capacitive load less than that of the bit line. The sense amplifier amplifies a first data using a voltage difference between the first node and the second node caused by a charge sharing operation, and a second data using a capacitive mismatch between the first node and the second node.
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