Invention Grant
US08194440B2 Phase change memory device having multiple reset signals and operating method thereof 有权
具有多个复位信号的相变存储器件及其操作方法

Phase change memory device having multiple reset signals and operating method thereof
Abstract:
A phase change memory device includes a cell array unit having a phase change resistance cell positioned at an intersection of a word line and a bit line. A write driving unit is configured to generate a single write voltage to the cell array unit when data to be written is a first data and is configured to generate a plurality of write voltages selectively when the data is a second data.
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