Invention Grant
- Patent Title: Non-volatile semiconductor memory device
- Patent Title (中): 非易失性半导体存储器件
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Application No.: US13087744Application Date: 2011-04-15
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Publication No.: US08174899B2Publication Date: 2012-05-08
- Inventor: Koki Ueno
- Applicant: Koki Ueno
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2009-058362 20090311
- Main IPC: G11C16/00
- IPC: G11C16/00

Abstract:
When data is written to a memory cell transistor, a write controller controls in such a manner that a verification operation subsequent to a program operation is carried out while a program voltage is increased stepwise for each program operation. The write controller controls in such a manner that a verification operation subsequent to a program operation by which a threshold voltage of a memory cell transistor to be written has become equal to or higher than a verification level for the first time is carried out twice or more at the same verification level, verification operations of the second and subsequent times are carried out after a second program operation which is carried out with the memory cell transistor set in an unselected state.
Public/Granted literature
- US20110194354A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2011-08-11
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