Invention Grant
- Patent Title: Enhanced architectural interconnect options enabled with flipped die on a multi-chip package
- Patent Title (中): 增强的架构互连选项在多芯片封装上支持翻转裸片
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Application No.: US12113389Application Date: 2008-05-01
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Publication No.: US08174103B2Publication Date: 2012-05-08
- Inventor: Gerald Keith Bartley , Darryl John Becker , Paul Eric Dahlen , Philip Raymond Germann , Andrew Benson Maki , Mark Owen Maxson
- Applicant: Gerald Keith Bartley , Darryl John Becker , Paul Eric Dahlen , Philip Raymond Germann , Andrew Benson Maki , Mark Owen Maxson
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Robert R. Williams
- Main IPC: H01L23/02
- IPC: H01L23/02
Abstract:
A particular chip is designed having a first variant (front side connected chip) of the chip and a second variant (back side connected chip). The first variant of the chip is attached to a carrier. The second variant of the chip is attached to the carrier inverted relative to the first variant of the chip. The first and second variants of the chip are attached to the carrier such that a vertical surface (side) of the first variant of the chip faces a corresponding vertical surface of the second variant of the chip. A circuit on the first variant of the chip is electrically connected to a corresponding circuit on the second variant of the chip.
Public/Granted literature
- US20090273098A1 Enhanced Architectural Interconnect Options Enabled With Flipped Die on a Multi-Chip Package Public/Granted day:2009-11-05
Information query
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