Invention Grant
- Patent Title: Method for manufacturing electronic devices integrated in a semiconductor substrate and corresponding devices
- Patent Title (中): 用于制造集成在半导体衬底中的电子器件和相应器件的方法
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Application No.: US12964579Application Date: 2010-12-09
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Publication No.: US08174076B2Publication Date: 2012-05-08
- Inventor: Ferruccio Frisina , Mario Giuseppe Saggio
- Applicant: Ferruccio Frisina , Mario Giuseppe Saggio
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.l.
- Current Assignee: STMicroelectronics S.r.l.
- Current Assignee Address: IT Agrate Brianza
- Agency: Seed IP Law Group PLLC
- Priority: EP05425495 20050708
- Main IPC: H01L29/66
- IPC: H01L29/66

Abstract:
A method manufactures a vertical power MOS transistor on a semiconductor substrate comprising a first superficial semiconductor layer of a first conductivity type, comprising: forming trench regions in the first semiconductor layer, filling in said trench regions with a second semiconductor layer of a second conductivity type, to form semiconductor portions of the second conductivity type contained in the first semiconductor layer, carrying out an ion implantation of a first dopant type in the semiconductor portions for forming respective implanted body regions of said second conductivity type, carrying out an ion implantation of a second dopant type in one of the implanted body regions for forming an implanted source region of the first conductivity type inside one of the body regions, carrying out an activation thermal process of the first and second dopant types with low thermal budget suitable to complete said formation of the body and source regions.
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