Invention Grant
- Patent Title: Memory control circuit, control method, and storage medium
- Patent Title (中): 存储器控制电路，控制方法和存储介质
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Application No.: US12774266Application Date: 2010-05-05
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Publication No.: US08169852B2Publication Date: 2012-05-01
- Inventor: Wataru Ochiai
- Applicant: Wataru Ochiai
- Applicant Address: JP Tokyo
- Assignee: Canon Kabushiki Kaisha
- Current Assignee: Canon Kabushiki Kaisha
- Current Assignee Address: JP Tokyo
- Agency: Canon U.S.A., Inc. IP Division
- Priority: JP2009-113837 20090508
- Main IPC: G11C8/18
- IPC: G11C8/18
Abstract:
A circuit configured to change a mode of a plurality of memory devices having a power saving mode includes a command queue configured to hold memory access, and a cancellation unit configured to cancel the power saving mode of target devices of the memory access held up to a predetermined stage of the command queue.
Public/Granted literature
- US20100287391A1 MEMORY CONTROL CIRCUIT, CONTROL METHOD, AND STORAGE MEDIUM Public/Granted day:2010-11-11
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