Invention Grant
- Patent Title: Sensing for all bit line architecture in a memory device
- Patent Title (中): 检测存储器件中的所有位线架构
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Application No.: US12561692Application Date: 2009-09-17
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Publication No.: US08169830B2Publication Date: 2012-05-01
- Inventor: Violante Moschiano , Giovanni Santin , Tommaso Vali
- Applicant: Violante Moschiano , Giovanni Santin , Tommaso Vali
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Leffert Jay & Polglaze, P.A.
- Main IPC: G11C16/06
- IPC: G11C16/06

Abstract:
Methods for sensing, memory devices, and memory systems are disclosed. One such method for sensing includes charging bit lines of an all bit line architecture to a precharge voltage, selecting a word line, and performing a sense operation on the bit lines. After the sense operation on the memory cells of the first selected word line is complete, the precharge voltage is maintained on the bit lines while a second word line is selected.
Public/Granted literature
- US20110063920A1 SENSING FOR ALL BIT LINE ARCHITECTURE IN A MEMORY DEVICE Public/Granted day:2011-03-17
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