Multi-bit semiconductor memory devices having both volatile and nonvolatile memory characteristics and methods of operating the same are disclosed, the semiconductor memory device including a floating body on an upper region of a substrate, a gate electrode on the floating body and electrically insulated from the floating body, source and drain regions on the substrate adjacent to the gate electrode and a charge trap layer between the floating body and the gate electrode, where first bit data is written in one of the charge trap layer and the floating body, and second bit data is written in one of the charge trap layer and the floating body in which first bit data is not written.