Invention Grant
US08168450B2 Semiconductor package, stacked semiconductor package having the same, and a method for selecting one semiconductor chip in a stacked semiconductor package
失效
半导体封装,具有该半导体封装的堆叠半导体封装以及用于选择堆叠半导体封装中的一个半导体芯片的方法
- Patent Title: Semiconductor package, stacked semiconductor package having the same, and a method for selecting one semiconductor chip in a stacked semiconductor package
- Patent Title (中): 半导体封装,具有该半导体封装的堆叠半导体封装以及用于选择堆叠半导体封装中的一个半导体芯片的方法
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Application No.: US12818512Application Date: 2010-06-18
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Publication No.: US08168450B2Publication Date: 2012-05-01
- Inventor: Bok Kyu Choi
- Applicant: Bok Kyu Choi
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2008-0062912 20080630
- Main IPC: H01L21/66
- IPC: H01L21/66

Abstract:
A semiconductor package includes a semiconductor chip having a circuit section. A first chip selection electrode passes through a first position of the semiconductor chip, and the first chip selection electrode has a first resistance and outputs a first signal. A second chip selection electrode passes through a second position of the semiconductor chip, and the second chip selection electrode has a second resistance greater than the first resistance and outputs a second signal. A signal comparison part is formed in the semiconductor chip and is electrically connected to the first and second chip selection electrodes. The signal comparison part compares the first signal applied from the first chip selection electrode to the second signal applied from the second chip selection electrode and outputs a chip selection signal to the circuit section depending upon the result of the comparison.
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