Invention Grant
US08151173B2 Semiconductor storage device comprising memory array including normal array and parity array
有权
半导体存储设备包括包括正常阵列和奇偶校验阵列的存储器阵列
- Patent Title: Semiconductor storage device comprising memory array including normal array and parity array
- Patent Title (中): 半导体存储设备包括包括正常阵列和奇偶校验阵列的存储器阵列
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Application No.: US12193326Application Date: 2008-08-18
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Publication No.: US08151173B2Publication Date: 2012-04-03
- Inventor: Masanobu Hirose , Masahisa Iida
- Applicant: Masanobu Hirose , Masahisa Iida
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2007-258436 20071002
- Main IPC: H03M13/00
- IPC: H03M13/00
Abstract:
Data latches, multiplexers, an ECC circuit section, and an input/output circuit section are arranged in columns and adjacent to each other, in an extending direction of data lines that are formed in a direction orthogonal to word lines. A layout of a data path system is formed in bit slices. Further, parity bits are equally distributed so as to cause delay times of bits to be uniform.
Public/Granted literature
- US20090089646A1 SEMICONDUCTOR STORAGE DEVICE Public/Granted day:2009-04-02
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