A system and method for controlling flash memory is provided for a flash memory controller to use a control interface to read the state register of at least a flash memory with received data for operation to detect whether the flash memory has already finished the operation on the received data without using an RB signal, and when the operation on the received data is to read, the controller can execute the state data switch so that the IO of flash memory can output correct flash memory data for read, or when the operation on the received data is to write, the controller can execute another data operation to save time and accelerate the data operation speed of the flash memory.