A nonvolatile semiconductor memory device comprising: a memory cell array including memory cells each provided at individual intersection between a first wiring and a second wiring, the memory cell comprising a variable resistive element, and predetermined numbers of the memory cells sharing the same first wiring to configure a page; a first control circuit configured to select a page subjected to data-writing, and to supply a constant voltage to the first wiring belonging to the selected page; a writing-voltage generating circuit configured to generate plural kinds of writing voltages for programming a resistance of the variable resistive element to one of three or more values based on a write-in data specifying three or more values; and a second control circuit configured to select the page subjected to data-writing, and to supply the writing voltages to predetermined numbers of the respective second wirings belonging to the selected page.