Invention Grant
US08149202B2 Flat display and method for modulating a clock signal for driving the same
有权
用于调制用于驱动它的时钟信号的平面显示和方法
- Patent Title: Flat display and method for modulating a clock signal for driving the same
- Patent Title (中): 用于调制用于驱动它的时钟信号的平面显示和方法
-
Application No.: US12006621Application Date: 2008-01-04
-
Publication No.: US08149202B2Publication Date: 2012-04-03
- Inventor: Jian-Xun Jiang , Chih-Hsun Weng
- Applicant: Jian-Xun Jiang , Chih-Hsun Weng
- Applicant Address: TW Chu-Nan
- Assignee: Chimei Innolux Corporation
- Current Assignee: Chimei Innolux Corporation
- Current Assignee Address: TW Chu-Nan
- Agency: Liu & Liu
- Main IPC: G09G3/36
- IPC: G09G3/36

Abstract:
A flat display and a method for modulating a clock signal for driving a flat display are provided. The flat display includes a clock generator and a clock modulator. The clock generator provides a clock signal that includes at least a first cycle waveform and a second cycle waveform following said first cycle waveform. The first cycle waveform is modulated by the clock modulator as a first modulated cycle waveform divided by a first positive modulated cycle waveform and a first negative modulated cycle waveform, and the second cycle waveform is modulated as a second modulated cycle waveform divided by a second positive modulated cycle waveform and a second negative modulated cycle waveform. The first positive modulated cycle waveform and the first negative modulated cycle waveform have a first duration difference, and the second positive modulated cycle waveform and the second negative modulated cycle waveform have a second duration difference different from the first duration difference.
Public/Granted literature
- US20090040160A1 Flat display and method for modulating a clock signal for driving the same Public/Granted day:2009-02-12
Information query
IPC分类: